Open silicon design

SiliconSpace combines cloud-based EDA tools with a collaborative ecosystem to provide a unified open-source ASIC design hub. Design, implement, and share your projects with others.

Breaking Down Barriers

Commercial EDA tool licenses can cost hundreds of thousands of dollars annually, putting professional chip design out of reach for individuals, small teams, and smaller institutions.

Access everything instantly through any web browser. Start designing immediately with pre-configured tool chains and PDKs.

Collaborative Ecosystem

Hardware design has traditionally been siloed within companies. SiliconSpace's Workshop creates an ecosystem where anyone can share projects, flow configurations, and build on each other's implementations.

Design Transparency

Understanding why a design achieved certain PPA (Power, Performance, Area) results is crucial. SiliconSpace makes the entire design flow transparent from RTL source code to synthesis configurations, APR settings, and final layout.

Built for Everyone

SiliconSpace welcomes anyone interested in chip design, from absolute beginners to experienced professionals:

  • •Students can experiment with chip design flows without requiring expensive software licenses.
  • •Researchers can rapidly prototype new architectures, evaluate design trade-offs, and publish reproducible results with full transparency.
  • •Hobbyists passionate about hardware can design and contribute to the growing open-source silicon movement.
  • •Professionals can prototype ideas quickly, evaluate different implementation strategies, and collaborate across organizations.

Technology Stack

Built on open-source EDA tools and modern infrastructure

RTL Design & Simulation

Code editor and waveform analysis

Monaco Editor
Icarus Verilog
VCDviz*

Synthesis

RTL to gate-level netlist

Yosys
ABC
netlistsvg**

Place & Route

Physical implementation

OpenROAD
OpenSTA

Verification

Coming soon

DRC and LVS checks

Magic
Netgen
* Built specifically for SiliconSpace · ** Modified for SiliconSpace

Frequently Asked Questions

Everything you need to know

What is SiliconSpace?
SiliconSpace is a cloud-based platform for designing custom chips (ASICs) using open-source EDA tools. We provide the entire toolchain, from RTL synthesis to physical layout, running on managed infrastructure so you can focus on your design instead of environment setup.
Why not run this locally?
You absolutely can. All tools we use are open-source. But setting up a working ASIC flow requires installing and validating PDKs, matching libraries, configuring scripts, and debugging tool interactions. We do this once, correctly, and run it for you on managed infrastructure so you can focus on design, not setup. If you prefer full control, you're always free to run the same tools locally. SiliconSpace is for when you want results without the setup burden.
Do I need chip design experience?
Not necessarily, anyone can jump in. We offer simple designs in our tutorial section to help you learn the fundamentals, and you can explore public projects in the Workshop to see complete design flows. Our platform handles all the complex toolchain setup so you can focus on creating.
What can I build with SiliconSpace?
Anything from simple digital logic blocks to complete processors and SoCs. We streamline the entire design process so you can build educational CPUs, custom accelerators, signal processing blocks, memory controllers, and more. If you can write it in Verilog/SystemVerilog, you can synthesize and implement it on SiliconSpace.
What PDKs (Process Design Kits) are available?
All users have access to SkyWater 130nm (sky130). Additional PDKs will be released as soon as we support them.
Can I collaborate with others?
Yes! Create or join an organization to work on projects with your team. Organization members can all access shared projects, contribute designs, and view results. You can also make projects public in the Workshop to share with the broader community and get feedback.
Is my design data secure?
Yes. Projects can be private to just you, private within your organization (visible only to org members), or made public in the Workshop. We don't share, sell, or use your designs for any purpose other than running the EDA tools you request. You have complete control over who can access your work.
What happens to my designs after I create them?
You retain full ownership of your designs. You can download all outputs (netlists, layouts, reports) at any time. For open-source projects, we encourage sharing in the Workshop, but it's always your choice. Your RTL and design files remain yours.
I found confidential IP on the Workshop. What do I do?
If you discover content that appears to contain confidential, proprietary, or unauthorized intellectual property, please contact us immediately at staff@siliconspace.org. We take IP concerns very seriously and will investigate and take appropriate action promptly.
Can I actually fabricate my design?
SiliconSpace can export industry-standard GDSII files from completed designs. Fabrication is not handled directly through the platform. You are responsible for selecting a fabrication service and ensuring your design meets all fabrication requirements, including DRC/LVS verification and foundry-specific tapeout rules.